F-16 HRPDG Qualification Testing and Integration

The F-16 System Program Office at Wright Patterson AFB is seeking information on sustainment of a High Resolution Programmable Display Generator (HRPDG), specifically the qualifcation of two additional Advanced Processor Circuit cards. See attached HRPDG Qual Testing and Integration Request for Information (RFI) for details. The attachment is a secure attachment and a controlled document access request will need to be submitted by interested vendors through SAM to obtain access to the documents.

Approval to access the documents is contingent upon verification of a current and active Joint Certification (JCP) certification/DD 2345 for the applicable cage code of the company requesting access. Information on the JCP program can be found at https://www.dla.mil/Logistics-Operations/Services/JCP. Responses to the RFI and/or questions shall be provided via e-mail to Contracting Officer, Laurie Auernig at laurie.auernig@us.af.mil and Program Manager, Lt John Lyons at john.lyons.16@us.af.mil. RFI responses are due by Friday 11 April 2025, 3:00 PM (MST).